While most image sensors can be configured to output a subset of their total resolution, unfortunately this doesn’t usually lead to energy savings as might have been expected [LiKamWa-2013]. While LiKamWa et al. explored energy saving methods possible when using existing sensors, this project focused on making a new image sensor which is energy-proportional. Suren Jayasuriya and I did this by adding power gating transistors to the amplifier and ADC in each of the sensor’s readout columns.
My task was to write Verilog RTL to describe a state machine based controller for implementing both the rolling-shutter readout as well as the control for the column power gating. I then pushed my design through Synopsys synthesis in the IBM 130nm technology, and for integration Suren connected my digital logic to his analog sensing circuitry.